The present invention relates to an operation of a nonvolatile memory device and, more particularly, to a method of operating a nonvolatile memory device, which can prevent voltage applied to a bit line from having an effect on a drain select transistor.
A semiconductor memory device is a memory device that is able to store data and read stored data. Semiconductor memory devices include volatile memory, which loses stored data when power is off, and nonvolatile memory, which retains stored data although power is off. Flash memory is a nonvolatile memory device that electrically erases data of cells in a group, and has been widely used in computers, memory cards, and so on.
Flash memory is divided into a NOR type and a NAND type according to bit lines of a cell and the connection status of the bit lines. NOR type flash memory has a structure in which two or more cell transistors are connected in parallel to one bit line, and is configured to store data using the channel hot electron method and erase data using the Fowler-Nordheim (F-N) tunneling method. NAND type flash memory has a structure in which two or more cell transistors are connected in series to one bit line, and is configured to store and erase data using the F-N tunneling method. In general, NOR type flash memory is disadvantageous in regard to high integration because of high current consumption, but is advantageous in regard to high speed. NAND type flash memory is advantageous in regard to high integration because it uses a low cell current when compared with NOR type flash memory.
A method of programming the nonvolatile memory device employs an incremental step pulse programming (ISPP) method. In the ISPP method, after applying a program pulse, a program voltage is applied while increasing the program voltage to memory cells having a threshold voltage level lower than a verify voltage level by a certain step, but program-inhibiting memory cells having threshold voltage distributions higher than the verify voltage level.
In nonvolatile memory devices such as the flash memory device, when a program operation is performed, one of an even bit line and an odd bit line is selected for program and the other is applied with a power supply voltage for program inhibition.
If voltage applied to the bit line is high, a high voltage is applied to a drain select transistor, thereby increasing a bias difference. Consequently, the memory device quality can be degraded.